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Freescale Semiconductor /MKE14Z7 /LPI2C0 /MCFGR1

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Interpret as MCFGR1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (000)PRESCALE 0 (0)AUTOSTOP 0 (0)IGNACK 0 (0)TIMECFG 0 (000)MATCFG 0 (000)PINCFG

MATCFG=000, PINCFG=000, TIMECFG=0, IGNACK=0, AUTOSTOP=0, PRESCALE=000

Description

Master Configuration Register 1

Fields

PRESCALE

Prescaler

0 (000): Divide by 1.

1 (001): Divide by 2.

2 (010): Divide by 4.

3 (011): Divide by 8.

4 (100): Divide by 16.

5 (101): Divide by 32.

6 (110): Divide by 64.

7 (111): Divide by 128.
AUTOSTOP

Automatic STOP Generation

0 (0): No effect.

1 (1): STOP condition is automatically generated whenever the transmit FIFO is empty and LPI2C master is busy.
IGNACK

When set, the received NACK field is ignored and assumed to be ACK

0 (0): LPI2C Master will receive ACK and NACK normally.

1 (1): LPI2C Master will treat a received NACK as if it was an ACK.
TIMECFG

Timeout Configuration

0 (0): Pin Low Timeout Flag will set if SCL is low for longer than the configured timeout.

1 (1): Pin Low Timeout Flag will set if either SCL or SDA is low for longer than the configured timeout.
MATCFG

Match Configuration

0 (000): Match disabled.

2 (010): Match enabled (1st data word equals MATCH0 OR MATCH1).

3 (011): Match enabled (any data word equals MATCH0 OR MATCH1).

4 (100): Match enabled (1st data word equals MATCH0 AND 2nd data word equals MATCH1).

5 (101): Match enabled (any data word equals MATCH0 AND next data word equals MATCH1).

6 (110): Match enabled (1st data word AND MATCH1 equals MATCH0 AND MATCH1).

7 (111): Match enabled (any data word AND MATCH1 equals MATCH0 AND MATCH1).
PINCFG

Pin Configuration

0 (000): LPI2C configured for 2-pin open drain mode.

1 (001): LPI2C configured for 2-pin output only mode (ultra-fast mode).

2 (010): LPI2C configured for 2-pin push-pull mode.

3 (011): LPI2C configured for 4-pin push-pull mode.

4 (100): LPI2C configured for 2-pin open drain mode with separate LPI2C slave.

5 (101): LPI2C configured for 2-pin output only mode (ultra-fast mode) with separate LPI2C slave.

6 (110): LPI2C configured for 2-pin push-pull mode with separate LPI2C slave.

7 (111): LPI2C configured for 4-pin push-pull mode (inverted outputs).

Links

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Register License

Redistribution and use in source and binary forms, with or without modification,\nare permitted provided that the following conditions are met:\n o Redistributions of source code must retain the above copyright notice, this list\n of conditions and the following disclaimer.\n o Redistributions in binary form must reproduce the above copyright notice, this\n list of conditions and the following disclaimer in the documentation and/or\n other materials provided with the distribution.\n o Neither the name of Freescale Semiconductor, Inc. nor the names of its\n contributors may be used to endorse or promote products derived from this\n software without specific prior written permission.\n THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS “AS IS” AND\n ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\n WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\n DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR\n ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\n (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON\n ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\n SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data